Table 6-92. Specad4Bot Register; Table 6-93. Specad4Bot Fields; Table 6-94. Specad4Top Register; Table 6-95. Specad4Top Fields - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

6.3.4.9 Specific Address 4 Bottom (SPECAD4BOT)

This register contains the least-significant bits of the destination address (bits [31:0]). Bit
zero indicates whether the address is multicast or unicast and corresponds to the least
significant bit of the first byte received
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR
BITS
31:0
6.3.4.10 Specific Address 4 Top (SPECAD4TOP)
This register contains the most-significant bits of the destination address (bits [47:32])
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR
BITS
31:16
15:0

Table 6-92. SPECAD4BOT Register

31 30 29 28 27
0 0 0 0 0
RW RW RW RW RW
15 14 13 12 11
0 0 0 0 0
RW RW RW RW RW

Table 6-93. SPECAD4BOT Fields

NAME
Least Significant Destination Address Bits Least significant bits
SPECAD4BOT
of the destination address.

Table 6-94. SPECAD4TOP Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
0 0 0 0 0
RW RW RW RW RW

Table 6-95. SPECAD4TOP Fields

NAME
/// Reserved Reading returns 0. Write the reset value.
Most Significant Destination Address Bits The most significant
SPECAD4TOP
bits of the destination address, that is bits 47 to 32.
.
26 25 24 23
SPECAD4BOT
0 0 0 0
RW RW RW RW
10 9 8 7
SPECAD4BOT
0 0 0 0
RW RW RW RW
0xFFFC7000 + 0xB0
FUNCTION
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
SPECAD4TOP
0 0 0 0
RW RW RW RW
0xFFFC7000 + 0xB4
FUNCTION
Version 1.0
Ethernet MAC Controller
22 21 20 19 18
0 0 0 0 0
RW RW RW RW RW
6 5 4 3 2
0 0 0 0 0
RW RW RW RW RW
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
0 0 0 0 0
RW RW RW RW RW
17 16
0 0
RW RW
1 0
0 0
RW RW
.
17 16
0 0
RO RO
1 0
0 0
RW RW
6-53