Table 14-9. Sr Register; Table 14-10. Sr Fields; Status Register (Sr) - Sharp LH79524 User Manual

Synchronous Serial Port

14.2.2.4 Status Register (SR)

SR is the Status Register. This register contains bits that indicate the FIFO fill status and
the SSP busy status.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:16
15:5
4
3
2
1
0
14-14
31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
0 0 0 0 0
W W W W W
NAME
Reserved Writing to these bits has no effect. Reading returns 0.
///
/// Reserved Write as zero. Unpredictable behavior when read.
SSP Busy Flag
BSY
1 = SSP is transmitting/receiving a frame or the transmit FIFO is non-empty
0 = SSP is idle
Receive FIFO Full
REFI
1 = Receive FIFO is full
0 = Receive FIFO is not full
Receive FIFO Not Empty
RNE
1 = Receive FIFO is not empty
0 = Receive FIFO is empty
Transmit FIFO Not Full
TNF
1 = Transmit FIFO is not full
0 = Transmit FIFO is full
Transmit FIFO Empty
TFE
1 = Transmit FIFO is empty
0 = Transmit FIFO is not empty

Table 14-9. SR Register

26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
///
0 0 0 0
W W W W
0xFFFC6000 + 0x00C

Table 14-10. SR Fields

DESCRIPTION
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
BSY REFI RNE
0 0 0 0 0
W W RO RO RO
17 16
0 0
RO RO
1 0
TNF TFE
1 1
RO RO