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Chapter 12 - Real Time Clock
12.1 Theory of Operation ..................................................................................... 12-1
12.2 Register Reference ...................................................................................... 12-3
Chapter 13 - Reset, Clock, and Power Controller
13.1 Theory of Operation ..................................................................................... 13-2
13.2 Register Reference ...................................................................................... 13-8
x
11.2.2.26 Multiplexing Control 20 Register (MUXCTL20) .......................... 11-38
11.2.2.27 Resistor Configuration Control 20 Register (RESCTL20) .......... 11-40
11.2.2.28 Multiplexing Control 21 Register (MUXCTL21) .......................... 11-42
11.2.2.29 Resistor Configuration Control 21 Register (RESCTL21) .......... 11-43
11.2.2.30 Multiplexing Control 22 Register (MUXCTL22) .......................... 11-44
11.2.2.31 Resistor Configuration Control 22 Register (RESCTL22) .......... 11-46
11.2.2.32 Multiplexing Control 23 Register (MUXCTL23) .......................... 11-48
11.2.2.33 Resistor Configuration Control 23 Register (RESCTL23) .......... 11-50
11.2.2.34 Multiplexing Control 24 Register (MUXCTL24) .......................... 11-52
11.2.2.35 Resistor Configuration Control 24 Register (RESCTL24) .......... 11-53
11.2.2.36 Multiplexing Control 25 Register (MUXCTL25) .......................... 11-54
12.1.1 Configuring the RTC for Use ................................................................. 12-2
12.2.1 Memory Map ......................................................................................... 12-3
12.2.2 Register Descriptions ............................................................................ 12-3
12.2.2.1 Data Register (DR) ......................................................................... 12-3
12.2.2.2 Match Register (MR) ...................................................................... 12-4
12.2.2.3 Load Register (LR) ......................................................................... 12-4
12.2.2.4 Control Register (CR) ..................................................................... 12-5
12.2.2.5 Interrupt Mask Set or Clear Register (IMSC).................................. 12-5
12.2.2.6 Raw Interrupt Status Register (RIS) ............................................... 12-6
12.2.2.7 Masked Interrupt Status Register (MIS) ......................................... 12-6
12.2.2.8 Interrupt Clear Register (ICR)......................................................... 12-7
13.1.1 System PLL and USB PLL Reset .......................................................... 13-3
13.1.2 Reset Generation .................................................................................. 13-3
13.1.3 Clock Generation................................................................................... 13-3
13.1.3.1 Enabling Clocks Prior to Programming Registers .......................... 13-3
13.1.3.2 Peripheral Block Clocks.................................................................. 13-4
13.1.3.3 External Clock Generation (CLKOUT)............................................ 13-4
13.1.4 Power Modes ........................................................................................ 13-6
13.1.4.1 Active Mode.................................................................................... 13-6
13.1.4.2 Standby Mode ................................................................................ 13-6
13.1.4.3 Sleep Mode .................................................................................... 13-6
13.1.4.4 Stop1 Mode .................................................................................... 13-6
13.1.4.5 Stop2 Mode .................................................................................... 13-7
13.1.4.6 Power Control in JTAG Mode......................................................... 13-7
13.2.1 Memory Map ......................................................................................... 13-8
13.2.2 Register Descriptions ............................................................................ 13-8
13.2.2.1 Control Register (CTRL)................................................................. 13-9
13.2.2.2 Identification Register (CHIPID) ................................................... 13-10
13.2.2.3 Remap Control Register (REMAP)............................................... 13-11
Version 1.0
LH79524/LH79252 User's Guide
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