Table 6-22. Enable Register; Table 6-23. Enable Fields; Interrupt Enable Register (Enable) - Sharp LH79524 User Manual

Ethernet MAC Controller

6.3.2.9 Interrupt Enable Register (ENABLE)

At reset all interrupts are disabled. Writing a 1 to the relevant bit location enables the
required interrupt. This register is write only
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR
BITS
31:14
13
12
11
10
9:8
7
6
5
4
3
2
1
0
6-32

Table 6-22. ENABLE Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
///
0 0 – – –
RO RO WO WO WO

Table 6-23. ENABLE Fields

NAME
/// Reserved Reading returns 0. Write the reset value.
PAUSETMZEROIEN Pause Time Zero Interrupt Enable
PAUSEFRRXIEN Pause Frame Received Interrupt Enable
NOTOKIEN Response Not OK Interrupt Enable
RECOVERRUNIEN Receive Overrun Interrupt Enable
/// Reserved Reading returns 0. Write the reset value.
TXCOMPIEN Transmit Complete Interrupt Enable
TXBUFEXHIEN Transmit Buffers Exhausted In Mid-frame Interrupt Enable
RETRYLMTEXIEN Retry Limit Exceeded Interrupt Enable
TXBUFUNDERIEN Transmit Buffer Underrun Interrupt Enable
TXUSEDBITIEN Transmit Used Bit Read Interrupt Enable
RXUSEDBITIEN Receive Used Bit Read Interrupt Enable
RXCOMPIEN Receive Complete Interrupt Enable
MNGDONEIEN Management Done Interrupt Enable
.
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
///
– – – –
WO WO WO WO
0xFFFC7000 + 0x28
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19
0 0 0 0
RO RO RO RO RO
6 5 4 3
– – – –
WO WO WO WO WO
FUNCTION
18 17 16
0 0 0
RO RO
2 1 0
– – –
WO WO