Receive Block - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

6.1.3 Receive Block

The Receive Block checks for a valid preamble, FCS, alignment, and length; presents
received frames to the DMA Block; and stores the frame's destination address for use by
the Address Checking Block.
During frame reception, if the frame is found to be too long or the Receive Error
(ETHERRXER) pin is asserted, a bad frame indication is sent to the DMA Block. The
DMA Block then ceases sending data to memory.
At the end of frame reception, the Receive Block indicates to the DMA Block whether the
frame is good or bad. The DMA Block recovers the current receive buffer if the frame
was bad. The Receive Block signals the register block to increment the alignment error,
the CRC (FCS) error, the short frame, long frame, jabber error, the receive symbol error
statistics and the length field mismatch statistics.
The Jumbo Frames enable bit (NETCONFIG:JUMBOFRM) instructs the EMAC to receive
jumbo frames of up to 10,240 bytes in size.This operation does not form part of the IEEE
802.3 specification and is disabled by default. When jumbo frames are enabled, frames
received with a frame size greater than 10,240 bytes are discarded.
Jumbo Frames of 2047 bytes or less have a four-byte FCS appended to the end of the
frame; Jumbo Frames greater than 2047 bytes have a 64-byte FCS appended. The FCS
value can be 'discarded' by programming NETCONFIG:DISCARDFCS to 1. This causes
the appended bytes to be discarded instead of being copied to memory. However, the
appended bytes are still transmitted with the frame and are filled with 0s. When operating
with Jumbo Frames, be sure to remove the FCS fields from the frame data.
6.1.4 Transmit Block
The Transmit Block transmits frames in accordance with the Ethernet IEEE 802.3
CSMA/CD protocol. Frame assembly starts by adding a preamble and the start frame
delimiter. Data is taken from the transmit FIFO one word at a time. Data is transmitted
least-significant nibble first. If NETCONFIG:BITRATE is programmed to 1, the data is seri-
alized and transmitted least-significant bit first instead.
If necessary, padding is added to make the frame length 60 bytes. A 32-bit CRC polyno-
mial is inverted and appended to the end of the frame, making the frame length a minimum
of 64 bytes. If the 'No CRC' bit is programmed to 1 in the second word of the final buffer
descriptor of a transmit frame, neither pad nor CRC are appended.
In full-duplex mode frames are transmitted immediately. Back-to-back frames are transmit-
ted at least 96 bit times apart to guarantee the inter-frame gap. In half-duplex mode, the
transmitter checks the Carrier Sense (ETHERCRS) pin. If asserted, it waits for it to deas-
sert, then starts transmission after the inter-frame gap of 96 bit times. If the Collision pin
(ETHERCOL) is asserted during transmission, the transmitter will transmit a jam sequence
of 32 bits taken from the data register and then retry transmission after the programmed
Back-Off Time has elapsed.
Version 1.0
Ethernet MAC Controller
6-9