Table 7-27. Refexit Register; Table 7-28. Refexit Fields; Dynamic Memory Self-Refresh Exit Time Register (Refexit) - Sharp LH79524 User Manual

External Memory Controller

7.5.2.9 Dynamic Memory Self-Refresh Exit Time Register (REFEXIT)

The Dynamic Memory Self-Refresh Exit Time Register enables programming the
Self-refresh Exit Time, tSREX. This value is normally found in SDRAM data sheets as
t . This register is used as the self-refresh exit time for all chip selects. Therefore, it
SREX
must be programmed with the longest exit time period required of all the chip selects.
This register should only be modified during system initialization, or when there are no
current or outstanding transactions. Software can ensure that there are no current or out-
standing transactions by waiting until the memory controller is idle, then entering Low-
Power Mode (CONTROL:MODE = 1), or Disable Mode (CONTROL:ENABLE = 0). When
in these two modes, external memory access is not allowed, ensuring that changing
parameters will not corrupt external data. Low-Power Mode automatically refreshes
SDRAM; Disable Mode requires commanding the SDRAM to Self Refresh (DYNMC-
TRL:SR = 1) prior to entering Disable.
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR
7-38

Table 7-27. REFEXIT Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
0 0 0 0 0
RO RO RO RO RO

Table 7-28. REFEXIT Fields

BITS NAME
31:4 /// Reserved Reading returns 0. Write the reset value.
Self-Refresh Exit Time
3:0 tSREX
Exit Time = (tSREX + 1) External Memory Clock periods
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
///
0 0 0 0
RO RO RO RO
0xFFFF1000 + 0x038
FUNCTION
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
tSREX
0 0 0 1 1
RO RO RO RW RW
17 16
0 0
RO RO
1 0
1 1
RW RW