Table 2-5. Lw Register; Table 2-6. Lw Fields; Low Word Register (Lw) - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

2.2.2.2 Low Word Register (LW)

LW is the Control Bank Low Word Register. This Read Only status register displays the
contents of the current conversion's low word in the control bank. There is a one-to-one
correspondence between the contents of the control bank low word and the contents of
this register for the current conversion in progress.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:14
13:2
1:0
31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
///
0 0 0 0 0
RO RO RO RO RO
NAME
/// Reserved Reading returns 0. Write the reset value.
Bias Control These bits turn the FETs on and off, as shown in
Figure 2-2. The bit number corresponds to the FET number in the figure.
IMPORTANT: bits 9-11 must always be written as 0b000. Writing a 1 to any
BIASCON
of these three bits can cause unpredictable results.
1 = FET ON
0 = FET OFF
Ref- Mux Determines the signal connected to the negative reference of the
ADC during Idle Mode.
00 = VREF- (negative terminal of the internal bandgap reference).
REFM
01 = AN1 (UR/X-)
10 = AN3 (LR/Y-)
11 = AN9
Analog-to-Digital Converter/Brownout Detector

Table 2-5. LW Register

26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
BIASCON
0 0 0 0
RO RO RO RO
0xFFFC3000 + 0x04

Table 2-6. LW Fields

DESCRIPTION
Version 1.0
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
0 0 0 0 0
RO RO RO RO RO
17 16
0 0
RO RO
1 0
REFM
0 0
RO RO
2-13