Table 16-24. Uartifls Register; Table 16-25. Uartifls Fields; Interrupt Fifo Level Select Register (Uartifls) - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

16.3.2.9 Interrupt FIFO Level Select Register (UARTIFLS)

UARTIFLS is the Interrupt FIFO Level Select Register. The UARTIFLS Register defines
the FIFO level at which interrupts are generated to request service for the receive and
transmit FIFOs. The interrupts are generated based on a transition through a level rather
than being based on the level; that is, the design is such that the interrupts are generated
when the fill level progresses through the trigger level. The bits are reset so that the trigger
level is when the FIFOs are at the half-way mark.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:6
5:3
2:0

Table 16-24. UARTIFLS Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
0 0 0 0 0
RO RO RO RO RO

Table 16-25. UARTIFLS Fields

NAME
/// Reserved Reading returns 0. Write the reset value.
Trigger Points for the Receive Interrupt
000 = Receive FIFO becomes
001 = Receive FIFO becomes
010 = Receive FIFO becomes
RXIFLSEL
011 = Receive FIFO becomes
100 = Receive FIFO becomes
101 = Receive FIFO becomes full
110:111 = Invalid
Trigger Points for the Transmit Interrupt
000 = Transmit FIFO becomes
001 = Transmit FIFO becomes
010 = Transmit FIFO becomes
TXIFLSEL
011 = Transmit FIFO becomes
100 = Transmit FIFO becomes
101 = Transmit FIFO becomes empty
110:111 = Invalid
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
///
0 0 0 0
RO RO RO RO
UART 0: 0xFFFC0000 + 0x034
UART 1: 0xFFFC1000 + 0x034
UART 2: 0xFFFC2000 + 0x034
DESCRIPTION
Version 1.0
22 21 20 19 18
0 0 0 0
RO RO RO RO RO
6 5 4 3
RXIFLSEL
0 0 1 0
RO RW RW RW RW
≥
1/8 full
≥
1/4 full
≥
1/2 full
≥
3/4 full
≥
7/8 full
≤
1/8 full
≤
1/4 full
≤
1/2 full
≤
3/4 full
≤
7/8 full
UARTs
17 16
0 0 0
RO RO
2 1 0
TXIFLSEL
0 1 0
RW RW
16-19