Table 7-33. Dwrt Register; Table 7-34. Dwrt Fields; Dynamic Memory Write Recovery Time Register (Dwrt) - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

7.5.2.12 Dynamic Memory Write Recovery Time Register (DWRT)

The Dynamic Memory Write Recovery Time Register enables programming the Write
Recovery Time, tWR. This value is normally found in SDRAM data sheets as tWR, tDPL,
tRWL, or tRDL.
This register must only be modified during system initialization, or when there are
no current or outstanding transactions. Software can ensure that there are no current or
outstanding transactions by waiting until the memory controller is idle, then entering
Low-Power Mode (CONTROL:MODE = 1), or Disable Mode (CONTROL:ENABLE = 0).
When in these two modes, external memory access is not allowed, ensuring that
changing parameters will not corrupt external data. Low-Power Mode automatically
refreshes SDRAM; Disable Mode requires commanding the SDRAM to Self Refresh
(DYNMCTRL:SR = 1) prior to entering Disable.
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR

Table 7-33. DWRT Register

31 30 29 28 27
0 0 0 0 0
RO RO RO R0 RO
15 14 13 12 11
0 0 0 0 0
RO RO RO RO RO
BITS NAME
31:4 /// Reserved Reading returns 0. Write the reset value.
Write Recovery Time
3:0 tWR
Write Recovery Time = (tWR + 1) External Memory Clock periods
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
///
0 0 0 0
RO RO RO RO
0xFFFF1000 + 0x044

Table 7-34. DWRT Fields

FUNCTION
Version 1.0
External Memory Controller
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
0 0 0 1 1
RO RO RO RW RW
17 16
0 0
RO RO
1 0
tWR
1 1
RW RW
7-41