Table 13-4. Ctrl Register; Table 13-5. Ctrl Fields; Control Register (Ctrl) - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

13.2.2.1 Control Register (CTRL)

The Control Register allows programming the Power Mode, Clock-Out source, and write
protecting RCPC registers.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:10
9
8
7
6:5
4:2
1:0
31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
///
0 0 0 0 0
RO RO RO RO RO
NAME
/// Reserved Reading returns 0. Write the reset value.
Lock
0 = All RCPC registers that are accessible through the APB, other than
LOCK
this bit and the INTCLR Register, are write protected.
1 = All RCPC APB-accessible registers are write enabled. (default)
/// Reserved Reading returns 0. Write the reset value.
Reserved Read as 0. Always write 0. Writing a 1 causes unpredictable
///
results.
CLKOUT Source Select Select the source clock for the CLKOUT
external clock pin.
00 = System Clock Oscillator (nominally 11.2896 MHz)
01 = Off*
OUTSEL
10 = FCLK
11 = HCLK
*IMPORTANT: For A.0 silicon, selection 01 is an invalid value. For A.1
silicon, the output is held LOW.
Power Down Mode Select These bits always read 0b000 because
the RCPC clears them automatically at wakeup.
000 = Active Mode
001 = Standby Mode
PWRDWNSEL
010 = Sleep Mode
011 = Stop1 Mode
100 = Stop2 Mode
Other values = undefined.
/// Reserved Reading returns 1. Always write 1.
Reset, Clock, and Power Controller

Table 13-4. CTRL Register

26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
/// ///
0 1 0 0
RO RW RO RW
0xFFFE2000 + 0x00

Table 13-5. CTRL Fields

DESCRIPTION
Version 1.0
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
OUTSEL PWRDWNSEL
1 1 0 0 0
RW RW RW RW RW
17 16
0 0
RO RO
1 0
///
1 1
RW RW
13-9