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Ethernet MAC Controller
6.2.1 Initialization
Initialization of the EMAC configuration must be done while the transmit and receive cir-
cuits are disabled. See the descriptions of the Network Control register and Network Con-
figuration register in Register Reference section.
6.2.1.1 Receive Buffer List
Receive data is written to buffers assigned to system memory. These buffers are
described in the Receive Buffer Queue, which is a sequence of Receive Buffer Descriptor
entries as defined in Table 6-1.
To create the Receive Buffer Descriptor list:
1.
Allocate a number (n) of buffers in system memory of 128 bytes each.
2.
Allocate an area 2
ory and create (m) entries in this list. Mark all entries in this list as owned by EMAC,
by programming bit 0 of Word 0 to 0.
3.
If fewer than 1,024 buffers are defined, the last descriptor must be marked with the
Wrap bit (bit 1 in Word 0 programmed to 1), which will allow the buffer usage to wrap
back to the first buffer.
4.
Write the system memory address of Receive Buffer Descriptor List to the RXBQP
register.
5.
The receive circuits can then be enabled by writing to the HASHBOT, HASHTOP,
SPECADxBOT, and SPECADxTOP address recognition registers, and then program-
ming NETCTL:RXEN to 1 to enable the receive circuit.
6.2.1.1.1 Address Matching
The HASHBOT, HASHTOP, and the four SPECADxBOT, SPECADxTOP register-pairs
must be programmed with the appropriate addresses (refer to Figure 6-2). Each register-
pair comprises a bottom register and top register with the bottom register being written first.
Address matching is disabled for a particular register pair after the bottom register has
been programmed and re-enabled when the top register is programmed. See
Section 6.1.5 for details of address matching. Each register pair may be written at any
time, regardless of whether the receive circuits are enabled or disabled.
6.2.1.1.2 Receiving Frames
When a frame is received and the receive circuits are enabled, the EMAC checks the
address and if it satisfies one of the listed cases, the frame is written to system memory:
• If it matches one of the four Specific Address registers.
• If it matches the Hash Address Function.
• If it is a Broadcast address (0xFFFFFFFFFFFF) and Broadcasts are allowed.
• If the EMAC is configured to promiscuous mode.
6-14
×
(n) words for the Receive Buffer Descriptor List in system mem-
Version 1.0
LH79524/LH79525 User's Guide
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