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Synchronous Serial Port
14.1.4 National Semiconductor Frame Format
Unlike the full-duplex transmission capabilities that the other two frame formats support,
the National Semiconductor Microwire format uses a special half-duplex, master-slave
messaging technique. In this mode:
1.
When a frame begins, an 8-bit control message is transmitted to the off-chip slave.
During this transmission, the SSP does not receive incoming data.
2.
After the message is sent, the off-chip slave decodes it, waits one serial clock after
the last bit of the 8-bit control message has been sent, and responds with the
requested data. The returned data can be 4 to 16 bits long, making the total frame
13 to 25 bits long.
During reception, data goes through a serial-to-parallel conversion before being placed
into the receive FIFO. The data is then read out via the AMBA APB interface.
In the Microwire mode, the SSP slave samples the first bit of receive data on the rising
edge of SSPCLK after SSPRX has gone LOW. Masters that drive a free-running SSPCLK
must ensure that the SSPRX signal has sufficient setup and hold margins with respect to
the rising edge of SSPCLK.
Figure 14-6 shows the National Semiconductor Microwire format for a single transfer.
Figure 14-7 shows this format for continuous transfers.
SSPCLK
SSPFRM
SSPTX
SSPRX
14-6
MSB
8-BIT CONTROL
Figure 14-6. Microwire Frame Format (Single Transfer)
Version 1.0
LH79524/LH79525 User's Guide
LSB
MSB
4 TO 16 BITS
OUTPUT DATA
LSB
LH79525-78
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