Table 11-52. Muxctl20 Register; Table 11-53. Muxctl20 Fields; Multiplexing Control 20 Register (Muxctl20) - Sharp LH79524 User Manual

I/O Configuration

11.2.2.26 Multiplexing Control 20 Register (MUXCTL20)

The MUXCTL20 Register allows software to configure a number of LH79524/LH79525
pins. Bits marked 'LH79524 Only' read as 0 with all writes 'reserved' on the LH79525.
BIT
FIELD
RESET
RW
BIT
FIELD
LH79525
RESET
LH79524
RESET
RW
ADDR
11-38

Table 11-52. MUXCTL20 Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
PE2 PL4
0 0 0 0 0
0 0 0 1 0
RW RW RW RW RW

Table 11-53. MUXCTL20 Fields

BIT NAME
31:16 /// Reserved Reading returns 0. Write the reset value.
PE2/LCDPS Assignment
00 = PE2
15:14 PE2
01 = LCDPS
10 = Reserved
11 = Reserved
PL4/D28 Assignment (LH79524 Only)
00 = PL4
13:12 PL4
01 = D28
10 = Reserved
11 = Reserved
PE1/LCDDCLK Assignment
00 = PE1
11:10 PE1
01 = LCDDCLK
10 = Reserved
11 = Reserved
PN1/D27 Assignment (LH79524 Only)
00 = PN1
9:8 PN1
01 = D27
10 = Reserved
11 = Reserved
PE0/LCDLP/LCDHRLP Assignment
00 = PE0
7:6 PE0
01 = LCDLP
10 = LCDHRLP
11 = Reserved
Version 1.0
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
PE1 PN1 PE0
0 0 0 0
0 0 1 0
RW RW RW RW
0xFFFE5000 + 0x98
DESCRIPTION
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
PN0 PF7
0 0 0 0 0
0 0 1 0 0
RW RW RW RW RW
17 16
0 0
RO RO
1 0
PF6
0 0
0 0
RW RW