Table 17-44. Outcount2 Register; Table 17-45. Outcount2 Fields; Table 17-46. Fifo Register; Table 17-47. Count1 Fields - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide
17.2.3.11 Out Count 2 Register (OUTCOUNT2)
OUTCOUNT2 is a read-only register that holds the upper 3 bits of the number of received
data bytes in the packet in the FIFO associated with the currently-selected OUT endpoint.
The value returned is valid while OUT_PKT_RDY (OUTCSR1.D0) is set.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
TYPE
ADDR
BITS
31:3
2:0
17.2.3.12 FIFOs for Endpoints 0-3 (FIFOx)
These 4 addresses provide CPU access to the FIFOs for each endpoint. Writing to these
addresses loads data into the IN FIFO for the corresponding endpoint. Reading from these
addresses unloads data from the OUT FIFO for the corresponding endpoint.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
TYPE
ADDR
BITS
31:8
7:0

Table 17-44. OUTCOUNT2 Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
///
0 0 0 0 0
RO RO RO RO RO

Table 17-45. OUTCOUNT2 Fields

NAME
/// Reserved Reading returns 0. Write the reset value.
Count of OUT EP1 or EP2 Packet Bytes This contains the upper 3 bits
OUTCOUNT2
of the number of bytes in the packet ready to be unloaded by software.

Table 17-46. FIFO Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
///
0 0 0 0 0
RO RO RO RO RO

Table 17-47. COUNT1 Fields

NAME
/// Reserved Reading returns 0. Write the reset value.
FIFO FIFO Accesses
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
0 0 0 0
RO RO RO RO
0xFFFF5000 + 0x05C
(with the INDEX register set to 1 or 2)
FUNCTION
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
0 0 0 0
RO RO RO RW
FIFO0 = 0xFFFF5000 + 0x080 (Endpoint 0)
FIFO1 = 0xFFFF5000 + 0x084 (Endpoint 1)
FIFO2 = 0xFFFF5000 + 0x088 (Endpoint 2)
FIFO3 = 0xFFFF5000 + 0x08C (Endpoint 3)
FUNCTION
FIFO access for each endpoint
Version 1.0
Universal Serial Bus Device
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
/// OUTCOUNT2
0 0 0 0 0
RO RO RO RO RO
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
FIFO
0 0 0 0 0
RW RW RW RW RW
17 16
0 0
RO RO
1 0
0 0
RO RO
17 16
0 0
RO RO
1 0
0 0
RW RW
17-31