Table 4-32. Intclr Register; Table 4-33. Intclr Fields; Interrupt Clear Register (Intclr) - Sharp LH79524 User Manual

Color Liquid Crystal Display Controller

4.5.3.10 Interrupt Clear Register (INTCLR)

Writing a 1 to an active bit in this register causes that interrupt to be cleared. This is a write-
only register.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:5
4-34

Table 4-32. INTCLR Register

31 30 29 28 27
0 0 0 0
RO RO RO RO RO
15 14 13 12 11
0 0 0 0
RO RO RO RO RO
NAME
/// Reserved Reading returns 0. Write the reset value.
Clear Masked AHB Master Error Interrupt
4 CMBEI
1 = Interrupt cleared
0 = No change
Clear Masked Vertical Compare Interrupt
3 CVCI
1 = Interrupt cleared
0 = No change
Clear Masked LCD Next Base Address Update Interrupt
2 CBUI
1 = Interrupt cleared
0 = No change
Clear Masked FIFO Underflow Interrupt
1 CFUI
1 = Interrupt cleared
0 = No change
0 /// Reserved Reading returns 0. Write the reset value.
26 25 24 23
///
0 0 0 0 0
RO RO RO RO
10 9 8 7
///
0 0 0 0 0
RO RO RO RO
0xFFFF4000 + 0x24

Table 4-33. INTCLR Fields

DESCRIPTION
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
0 0 0 0 0
RO RO WO WO WO
17 16
0 0
RO RO
1 0
///
0 0
WO RO