Table 9-8. Icusar Register; Table 9-9. Icusar Fields; Table 9-10. Icdata Register; Table 9-11. Icdata Fields - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide
9.2.2.3 I
Software programs the ICUSAR register with the upper 2 address bits in 10-bit addressing
mode, plus the read/write data direction (SRW) bit. This register is not used in Master mode.
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR
BITS
31:8
7:3
2:1
0
9.2.2.4 I
The ICDATA register holds the received data or the data to be transmitted.
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR
2
C Upper Slave Address Register (ICUSAR)
31 30 29 28 27
0 0 0 0
RO RO RO RO RO
15 14 13 12 11
///
0 0 0 0
RO RO RO RO RO
NAME
/// Reserved Reading returns 0. Write the reset value.
Upper Address This field is only used for 10-bit mode. When using 10-bit
UPPERAD mode, this field must be programmed to 0b11110. When using 7-bit mode,
this field must be programmed to 0b00000, which is the reset value.
Slave Address Bits [9:8] This field contains the upper 2 bits of the 10-bit
SLAD89
slave address. This field is not used in 7-bit addressing mode.
/// Reserved Reading returns 0. Write the reset value.
2
C Data Register (ICDATA)

Table 9-10. ICDATA Register

31 30 29 28
0 0 0 0
RO RO RO RO RO
15 14 13 12
///
0 0 0 0
RO RO RO RO RO
BITS NAME
31:8 /// Reserved Reading returns 0. Write the reset value.
2
7:0 DAT
I C Data This field contains the transmitted or received I

Table 9-8. ICUSAR Register

26 25 24 23
///
0 0 0 0 0
RO RO RO RO
10 9 8 7
0 0 0 0 0
RO RO RO RW
0xFFFC5000 + 0x08

Table 9-9. ICUSAR Fields

DESCRIPTION
27 26 25 24 23
///
0 0 0 0 0
RO RO RO RO
11 10 9 8 7
0 0 0 0 0
RO RO RO RW
0xFFFC5000 + 0x0C

Table 9-11. ICDATA Fields

DESCRIPTION
Version 1.0
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
UPPERAD SLAD89
0 0 0 0 0
RW RW RW RW RW
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
DAT
0 0 0 0 0
RW RW RW RW RW
2
C data.
2
I C Module
17 16
0 0
RO RO
1 0
///
0 0
RW RW
17 16
0 0
RO RO
1 0
0 0
RW RW
9-9