Table 18-27. Itop Register; Table 18-28. Itop Fields; Interrupt Test Output Register (Itop) - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

18.2.2.13 Interrupt Test Output Register (ITOP)

Reading the ITOP register returns the status of the IRQ and FIQ interrupt request outputs
from the VIC to the ARM exception-handling circuitry.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR

Table 18-27. ITOP Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
///
0 0 0 0 0
RO RO RO RO RO
BIT NAME
31:8 Reserved Reading returns 0. Write the reset value.
///
VIC IRQ Output Status
7 VI
1 = an IRQ interrupt request to the ARM core is asserted.
0 = an IRQ interrupt request to the ARM core is not asserted.
VIC FIQ Output Status
6 VF
1 = an FIQ interrupt request to the ARM core is asserted.
0 = an FIQ interrupt request to the ARM core is not asserted.
5:0 Reserved Reading returns 0. Write the reset value.
///
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
VF
0 0 0 0
RO RO RO RO
0x30C
0xFFFFF000 +

Table 18-28. ITOP Fields

DESCRIPTION
Version 1.0
Vectored Interrupt Controller
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
VI ///
0 0 0 0 0
RO RO RO RO RO
17 16
0 0
RO RO
1 0
0 0
RO RO
18-15