Table 15-26. T1Cmpn Registers; Table 15-27. T1Cmpn Register Definitions; Timer 1 Compare Registers (T1Cmpn) - Sharp LH79524 User Manual

Timers

15.2.2.12 Timer 1 Compare Registers (T1CMPn)

There are two CMP(n) Registers for Timer 1. They are designated:
• T1CMP0
• T1CMP1
Each register is a 16-bit, Read/Write register. Contents of these registers are compared
continuously with the counter CNT1. When both register and counter values match, the
timer behaves as programmed in the CTRL1 register.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:16
15:0
15-20

Table 15-26. T1CMPn Registers

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
1 1 1 1 1
RW RW RW RW RW

Table 15-27. T1CMPn Register Definitions

NAME
/// Reserved Reading this field returns 0. Write the reset value.
TM1CMP Timer 1 Compare 16-bit Compare Register Value.
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
TM1CMP
1 1 1 1
RW RW RW RW
T1CMP0: 0xFFFC4000 + 0x40
T1CMP1: 0xFFFC4000 + 0x44
DESCRIPTION
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
1 1 1 1 1
RW RW RW RW RW
17 16
0 0
RO RO
1 0
1 1
RW RW