Table 11-34. Muxctl12 Register; Table 11-35. Muxctl12 Fields; Multiplexing Control 12 Register (Muxctl12) - Sharp LH79524 User Manual

I/O Configuration

11.2.2.17 Multiplexing Control 12 Register (MUXCTL12)

The MUXCTL12 Register allows software to configure a number of LH79524/LH79525
pins. Bits marked 'LH79524 Only' read as 0 with all writes 'reserved' on the LH79525.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
8-Bit
RESET
16-Bit
RESET
32-Bit
RW
ADDR
11-26

Table 11-34. MUXCTL12 Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
PK0 PD0
0 0 0 0 0
0 0 0 1 0
0 1 0 1 0
RW RW RW RW RW

Table 11-35. MUXCTL12 Fields

BIT NAME
31:16 /// Reserved Reading returns 0. Write the reset value.
PK0/D16 Assignment (LH79524 Only)
00 = PK0
15:14 PK0
01 = D16
10 = Reserved
11 = Reserved
PD0/D8 Assignment
00 = PD0
13:12 PD0
01 = D8
10 = Reserved
11 = Reserved
11:0 /// Reserved Reading returns 0. Write the reset value.
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
0 0 0 0
0 0 0 0
0 0 0 0
RW RW RW RW
0xFFFE5000 + 0x58
DESCRIPTION
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
///
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
RW RW RW RW RW
17 16
0 0
RO RO
1 0
0 0
0 0
0 0
RW RW