Table 5-19. Curshi Register; Table 5-20. Curshi Fields; Table 5-21. Curslo Register; Table 5-22. Curslo Fields - Sharp LH79524 User Manual

Direct Memory Access Controller

5.2.2.5 Current Source Registers (CURSHI and CURSLO)

The Current Source Registers are 16-bit Read Only registers that hold the current value of
the source address pointer. The value in the registers is used as an AHB address in a
source-to-DMA data transfer over the AHB. If the CTRL:SOINC bit is programmed to 1, the
value in the Current Source Registers increments as data transfers from a source to the
DMA. The value increments at the end of the address phase of the AHB transfer by the
HSIZE value. If the CTRL:SOINC bit is 0, the Current Source Register holds the same
value during the entire DMA data transfer.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:16
15:0
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:16
15:0
5-12

Table 5-19. CURSHI Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
0 0 0 0 0
RW RW RW RW RW
NAME
/// Reserved Reading returns 0. Write the reset value.
Current Source Lower Address This field contains the higher 16-bits of the
CURSHI
address for the source of data for the current DMA transfer.

Table 5-21. CURSLO Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
0 0 0 0 0
RW RW RW RW RW

Table 5-22. CURSLO Fields

NAME
/// Reserved Reading returns 0. Write the reset value.
Current Source Lower Address This field contains the lower 16-bits of the
CURSLO
address for the source of data for the current DMA transfer.
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
CURSHI
0 0 0 0
RW RW RW RW
DATASTREAM x BASE + 0x018

Table 5-20. CURSHI Fields

DESCRIPTION
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
CURSLO
0 0 0 0
RW RW RW RW
DATASTREAM x BASE + 0x01C
DESCRIPTION
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
0 0 0 0 0
RW RW RW RW RW
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
0 0 0 0 0
RW RW RW RW RW
17 16
0 0
RO RO
1 0
0 0
RW RW
17 16
0 0
RO RO
1 0
0 0
RW RW