Table 2-23. Ihwctrl Register; Table 2-24. Ihwctrl Fields; Idle High Word Register (Ihwctrl) - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

2.2.2.11 Idle High Word Register (IHWCTRL)

IHWCTRL is the high word of the Idle Register. The active bits used in this register are
Read/Write.
This register specifies the idle setting time and the inputs connected to the ADC during the
Idle state. This register is used with the ILWCTRL Register (see Section 2.2.2.12).
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:16
15:7
6:3
2
1:0

Table 2-23. IHWCTRL Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
SETTIME_ID
0 0 0 0 0
RW RW RW RW RW

Table 2-24. IHWCTRL Fields

NAME
/// Reserved Reading returns 0. Write the reset value.
Idle Settling Time Specifies the delay, in ADC clock cycles, from when
the state machine enters the Idle state to when the Pen Interrupt signal
SETTIME_ID
can be activated. Prevents spurious trigger of Pen Interrupt while analog
signals set up by the IDLE Register are settling.
Idle In+ Mux Specifies the connection to the positive input of the ADC
INP_ID
during Idle Mode. See Table 2-4.
Idle In- Mux Specifies the connection to the negative input of the ADC
during Idle Mode.
INM_ID
1 = GND
0 = Ref-
Idle Ref+ Mux Specifies the connection to the positive reference of the
ADC during Idle Mode.
00 = VREF+
REFP_ID
01 = AN0/UL/X+
10 = AN2/LL/Y+
11 = AN8
Analog-to-Digital Converter/Brownout Detector
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
0 0 0 0
RW RW RW RW
0xFFFC3000 + 0xA4
DESCRIPTION
Version 1.0
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
INP_ID
0 0 0 0 0
RW RW RW RW RW
17 16
0 0
RO RO
1 0
REFP_ID
0 0
RW RW
2-23