LH79524/LH79525 User's Guide
17.2.2.4 Interrupt Register for OUT Endpoint 1 and 2 (OIR)
The OUT Interrupt register (OIR) acts as an interrupt status register for the OUT endpoint EP1
and EP2. Upon interrupt, software should read each of the three interrupt registers (IIR, OIR,
and UIR), which clears the interrupt bit. The UIR must be the last register read and cleared.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
TYPE
ADDR
BITS
31:3
2
1
0
31
30
29
28
27
0
0
0
0
RO
RO
RO
RO
RO
15
14
13
12
11
0
0
0
0
RO
RO
RO
RO
RO
NAME
///
Reserved Reading returns 0. Write the reset value.
EP2 Out Interrupt This interrupt is generated for Isochronous OUT trans-
fers. The USB block programs this bit to 1 when: OUT_PKT_RDY and
SENT_STALL are set to 1 by the USB Host. Software clears this interrupt by
EP2OUT
reading this register.
1 = Isochronous OUT transfer is ready
0 = Interrupt cleared or the above conditions are not met
EP1 Out Interrupt This interrupt is generated for BULK OUT transfers. The
USB block programs this bit to 1 when: OUT_PKT_RDY and SENT_STALL are
set to 1 by the USB Host. Software clears this interrupt by reading this register.
EP1OUT
1 = BULK OUT transfer is ready
0 = Interrupt cleared or the above conditions are not met
///
Reserved Reading returns 0. Write the reset value.
Table 17-10. OIR Register
26
25
24
23
///
0
0
0
0
0
RO
RO
RO
RO
10
9
8
7
///
0
0
0
0
0
RO
RO
RO
RO
0xFFFF5000 + 0x010
Table 17-11. OIR Fields
FUNCTION
Version 1.0
Universal Serial Bus Device
22
21
20
19
18
0
0
0
0
0
RO
RO
RO
RO
RO
6
5
4
3
2
0
0
0
0
0
RO
RO
RO
RO
RO
17
16
0
0
RO
RO
1
0
///
0
0
RO
RO
17-13