Table 1-12. Apb Peripheral Register Mapping - Sharp LH79524 User Manual

Overview
NOTE:
1-16

Table 1-12. APB Peripheral Register Mapping

ADDRESS RANGE
0xFFFC0000 - 0xFFFC0FFF
0xFFFC1000 - 0xFFFC1FFF
0xFFFC2000 - 0xFFFC2FFF
0xFFFC3000 - 0xFFFC3FFF
0xFFFC4000 - 0xFFFC4FFF
0xFFFC5000 - 0xFFFC5FFF
0xFFFC6000 - 0xFFFC6FFF
0xFFFC7000 - 0xFFFC7FFF
0xFFFC8000 - 0xFFFC8FFF
0xFFFC9000 - 0xFFFD8FFF
0xFFFD9000 - 0xFFFD9FFF
0xFFFDA000 - 0xFFFDAFFF
0xFFFDB000 - 0xFFFDBFFF
0xFFFDC000 - 0xFFFDCFFF
0xFFFDD000 - 0xFFFDDFFF
0xFFFDE000 - 0xFFFDEFFF
0xFFFDF000 - 0xFFFDFFFF
0xFFFE0000 - 0xFFFE0FFF
0xFFFE1000 - 0xFFFE1FFF
0xFFFE2000 - 0xFFFE2FFF
0xFFFE3000 - 0xFFFE3FFF
0xFFFE4000 - 0xFFFE4FFF
0xFFFE5000 - 0xFFFE5FFF
0xFFFE6000 - 0xFFFE6FFF
0xFFFE7000 - 0xFFFEFFFF
*Reads as '0', writes have no effect
UART0
UART1
UART2
Analog-to-Digital Convertor
Timer Module
2
I C
Synchronous Serial Port
Ethernet
2
I S Converter
Reserved*
GPIO Ports M&N
GPIO Ports K&L
GPIO Ports I&J
GPIO Ports G&H
GPIO Ports E&F
GPIO Ports C&D
GPIO Ports A&B
Real Time Clock
DMA Controller
Reset Clock and Power Controller
Watchdog Timer
LCD ICP (AD-TFT/HR-TFT/ALI support)
I/O Configuration Peripheral
Boot Controller
Invalid Access
Version 1.0
LH79524/LH79525 User's Guide
DEVICE