Table 18-2. Vic Register Summary; Register Reference - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

18.2 Register Reference

This section provides the VIC register memory mapping and bit fields.
18.2.1 Memory Map
Table shows the mapping of the VIC registers. The base address for the VIC is
0xFFFFF000.

Table 18-2. VIC Register Summary

ADDRESS OFFSET
IRQSTATUS
0x000
0x004 FIQSTATUS
0x008 RAWINTR
0x00C INTSELECT
0x010 INTENABLE
0x014 INTENCLEAR
0x018
0x01C SOFTINT_CLEAR Software Interrupt Clear Register
0x020
0x030 VECTADDR
0x034 DEFVECTADDR
0x100 VECTADDR0
0x104 VECTADDR1
0x108 VECTADDR2
0x10C VECTADDR3
0x110 VECTADDR4
0x114 VECTADDR5
0x118 VECTADD6
0x11C VECTADDR7
0x120 VECTADDR8
0x124 VECTADDR9
0x128 VECTADDR10
0x12C VECTADDR11
0x130 VECTADDR12
0x134 VECTADDR13
0x138 VECTADDR14
0x13C VECTADDR15
0x200 VECTCTRL0
0x204 VECTCTRL1
0x208 VECTCTRL2
0x20C VECTCTRL3
0x210 VECTCTRL4
0x214 VECTCTRL5
0x218 VECTCTRL6
0x21C VECTCTRL7
Version 1.0
NAME DESCRIPTION
IRQ Status Register
FIQ Status Register
Raw Interrupt Status Register
Interrupt Select Register
Interrupt Enable Register
Interrupt Enable Clear Register
SOFTINT Software Interrupt Register
/// Reserved — Do not access
Vector Address Register
Default Vector Address Register
Vector Address 0 Register
Vector Address 1 Register
Vector Address 2 Register
Vector Address 3 Register
Vector Address 4 Register
Vector Address 5 Register
Vector Address 6 Register
Vector Address 7 Register
Vector Address 8 Register
Vector Address 9 Register
Vector Address 10 Register
Vector Address 11 Register
Vector Address 12 Register
Vector Address 13 Register
Vector Address 14 Register
Vector Address 15 Register
Vector Control 0 Register
Vector Control 1 Register
Vector Control 2 Register
Vector Control 3 Register
Vector Control 4 Register
Vector Control 5 Register
Vector Control 6 Register
Vector Control 7 Register
Vectored Interrupt Controller
18-5