Control Bank Low Word Register; Table 23-5. Lw Register; Table 23-6. Lw Register Definitions - Sharp Blue Treak LH75400 User Manual

System-on-chip preliminary

Table of Contents

LH75400/01/10/11 (Preliminary) User's Guide

23.3.2.2 Control Bank Low Word Register

LW is the Control Bank Low Word Register. This Read Only status register displays the

contents of the current conversion's low word in the control bank. There is a one-to-one

correspondence between the contents of the control bank low word and the contents of

this register for the current conversion in progress.

Reserved Read as zero.

Bias Control These bits drive the FETs, as shown in Figure 23-2. B2 in the

figure corresponds to bit [2] in this register. Bits [11:9] must be written as

Ref- Mux Determines the signal connected to the negative reference of the

ADC during Idle Mode.

00 = VREF- (negative terminal of the internal bandgap reference)

01 = AN1 (UR/X-)

10 = AN3 (LR/Y-)

Analog-to-Digital Converter/Brownout Detector

0xFFFC3000 + 0x04