Controller Area Network
22.3.2.19 Receive Message Counter Register
RMC is the Receive Message Counter Register. The RMC Register records the number
of messages currently available in the Receive FIFO. It increments automatically with each
Receive event and decrements with each Release Receive Buffer command. It is available
for Read Only access in both Operating Mode and Reset Mode.
The register is reset to 00h by either a System Reset or a Software Reset.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:8
7:0
22-28
Table 22-34. RMC Register
31
30
29
28
27
0
0
0
0
0
R
R
R
R
R
15
14
13
12
11
0
0
0
0
0
R
R
R
R
R
Table 22-35. RMC Register Definitions
NAME
Reserved Writing to these bits has no effect. Reading returns 0.
///
Receive FIFO Messages Specifies the number of messages cur-
RMC.4 - RMC.0
rently available in the Receive FIFO.
LH75400/01/10/11 (Preliminary) User's Guide
26
25
24
23
22
///
0
0
0
0
R
R
R
R
R
10
9
8
7
///
0
0
0
0
R
R
R
R
R
0xFFFC5000 + 0x74
DESCRIPTION
6/17/03
21
20
19
18
0
0
0
0
0
R
R
R
R
6
5
4
3
2
0
0
0
0
0
R
R
R
R
17
16
0
0
R
R
1
0
0
0
R
R