Supply Clock; Register; Register List - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64
8.4

Supply clock

The APB clock is supplied to the RBC. Please refer to the chapter Clock Reset Generator (CRG)
for details about frequency setting and control of the clock.
8.5

Register

This section describes the RBC registers.
8.5.1

Register list

The RBC is controlled by the registers shown in Table 8-2.
Table 8-2 RBC register list
Address
Base Offset
FFFE_6000 + 00
H H
+ 04
H
+ 08
H
+ 0C
H
+ 10
H
– +
FFF
H
8-2
Register name
(Reserved)
Remap control register
VINITHI control register A
INITRAM control register A
(Reserved)
Abbreviation
– Reserved area (access prohibited)
RBREMAP Remap state control
RBVIHA VINITHI output signal control
RBITRA INITRAM output signal control
– Reserved area (access prohibited)
Description