Retry, Split, And Error; Retry And Split - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64

15.7.4 Retry, split, and error

The DMAC module supports retry and split responses from AHB slaves.

When the DMAC receives a retry or split response from an AHB slave during DMA transfer, it

negates bus temporarily to reconstruct the contents to be retransmitted.

Figure 15-11 shows an example of receiving a retry response during INCR4 DMA transfer.

DMACA[19:16]

Figure 15-11 Increment/Lap beat transfer (example of INCR4 block transfer)

When DMAC negates bus temporarily, the channel received retry/split responses is continuously

selected by DMAC's priority controller that transfer operation is able to start even though higher

priority channel requests the bus

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