Beat Transfer; Normal And Single Transfer - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64

15.7.2 Beat transfer

The DMAC supports beat transfer corresponding to an increment/lap burst of the AMBA standard.
The DMAC has a 64 byte FIFO shared by all channels and enables sequential source access
and destination access. The beat transfer type is set using the DMACA/BT bits.
The correlation to DMACA/BT and AHB of HBURST is shown below.
Table 15-2 DMACA/BT and HBURST
DMACA/BT
4'b0000
Normal
4'b1000
Single
4'b1001
INCR
4'b1010
WRAP4
4'b1011
INCR4
4'b1100
WRAP8
4'b1101
INCR8
4'b1110
WRAP16
4'b1111
INCR16
In demand transfer mode, increment/lap burst (INCR* and WRAP*) are unsupported.
15.7.2.1

Normal and Single transfer

The Normal and Single transfer methods are the same. Single source access and single
destination access are executed alternately as shown in Figure 15-2 and Figure 15-3.
Beat transfer type
HBURST
Single
Single
INCR
WRAP4
INCR4
WRAP8
INCR8
WRAP16
INCR16
DMACA/MS (mode select)
Block
Burst
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
Demand
OK
OK
NG
NG
NG
NG
NG
NG
NG
15-29

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