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MB86R02 'Jade-D' Hardware Manual V1.64
13.6.13
DRAM ODT SETTING register (DROS)
This register sets ODT control signal to DDR2 memory connected to external part.
Address
Bit
15
14
13
Name
-
-
-
R/W
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value
X
X
X
Bit field
No.
Name
15-1
(Reserved)
0
ODT0
13-18
12
11
10
9
-
-
-
-
X
X
X
X
Reserved bits.
Write access is ignored.
This is the value of external output pin, ODTCONT.
Initial value is 0.
F300_0000
+ 60
H
H
8
7
6
5
-
-
-
-
X
X
X
X
Description
4
3
2
1
ODT
-
-
-
-
X
X
X
X
0
0
0
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