Supply Clock; Registers - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64

31.3 Supply clock

The APB clock is supplied to the CAN interface. Please refer to "Clock Reset generator (CRG)"
for information about setting the frequency and the control specifications of this clock.

31.4 Registers

The register mapping of this GDC is in byte addresses (8 bit).
16 bit length registers are allocated by word address units (32 bit) for the local address of CAN;
thus the valid data in 32 bit width data of the APB Bus is 16 bit.
Table 31-1 CAN 0ch register map
Register address
FFF5_4000h
FFF5_4004h
FFF5_4008h
...
Table 31-2 CAN 1ch register map
Register address
FFF5_5000h
FFF5_5004h
FFF5_5008h
...
31-2
CAN 0ch register address
00h
02h
04h
...
CAN 1ch register address
00h
02h
04h
...
APB Bus data[31:0]
{0x0000, 16 bit data}
{0x0000, 16 bit data}
{0x0000, 16 bit data}
...
APB Bus data [31:0]
{0x0000, 16 bit data}
{0x0000, 16 bit data}
{0x0000, 16 bit data}
...