I2Sxmcr0Reg Register - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64

27.6.6 I2SxMCR0REG register

Address
Bit
31
30
29
Name
R/W
R
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial
0
0
0
Bit
15
14
13
Name
R/W
R
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial
0
0
0
Bit field
No.
Name
31
(Reserved)
30-26
S1CHN[4:0]
25-21
S1CHL[4:0]
20-16
S1WDL[4:0]
15
(Reserved)
14-10
S0CHN[4:0]
ch0:FFEE_000C (h)
28
27
26
25
S1CHN
0
0
0
0
12
11
10
9
S0CHN
0
0
0
0
Reserved bits.
The write access is ignored. The read value of these bits is always "0".
Number of channel of sub frame 1 is set.
This is valid only when the frame is 2 sub frame construction (SBFN of CNTREG is "1"),
and is invalid when the frame is 1 sub frame construction (SBFN of CNTREG is "0".)
Up to 32 channels are able to be specified, and S1CHN needs to be set to "number of
channel – 1".
Example 1 S1CHN = "00011": Sub frame 1 becomes 4 channel construction
Example 2 S1CHN = "11111": Sub frame 1 becomes 32 channel construction
S1WDL is valid only in 2 sub frame construction (SBFN of CNTREG is "1") and is invalid
in 1 sub frame construction (SBFN of CNTREG is "0".)
Channel length of the channel constructing sub frame 1 (bit length of channel) is set.
7 - 32 bit of channel length are available but 1 - 6 bit are prohibited. S1CHN needs to
be set to "number of channel – 1".
Example 1 S1CHL = "00110": Channel length becomes 7 bit
Example 2 S1CHL = "11111": Channel length becomes 32 bit
Channel length is able to be set to 32 or less regardless of RHLL value of CNTREG
register.
S1WDL is valid only in 2 sub frame construction (SBFN of CNTREG is "1") and is invalid
in 1 sub frame construction (SBFN of CNTREG is "0".)
Word length of the channel constructing sub frame 1 (bit length of channel) is set.
7 - 32 bit of word length are available but 1 - 6 bit are prohibited. S1WDL needs to be
set to "word length – 1".
Example 1 S1WDL = "00110": Word length becomes 7 bit
Example 2 S1WDL = "11111": Word length becomes 32 bit
RHLL of CNTREG register is "1": Set word length to 16 or less and channel length to
shorter than the one set to S1CHL
RHLL of CNTREG register is "0": Set word length to 32 or less and channel length to
shorter than the one set to S1CHL
S1WDL is valid only in 2 sub frame construction (SBFN of CNTREG is "1") and is invalid
in 1 sub frame construction (SBFN of CNTREG is "0".)
Reserved bits.
The write access is ignored. The read value of these bits is always "0".
Number of channel of sub frame 0 is set up to 32 channels.
S0CHN needs to be set to "number of channel – 1".
Example 1 S0CHN = "00011": Sub frame 0 becomes 4 channel construction
Example 2 S0CHN = "11111": Sub frame 0 becomes 32 channel construction
24
23
22
21
S1CHL
0
0
0
0
8
7
6
5
S0CHL
0
0
0
0
Description
20
19
18
17
S1WDL
0
0
0
0
4
3
2
1
S0WDL
0
0
0
0
27-11
16
0
0
0

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