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MB86R02 'Jade-D' Hardware Manual V1.64
HTP (Horizontal Total Pixels)
Register
DisplayBaseAddress + 0x06
address
Bit number
15
Bit field name
Reserved
R/W
Initial value
This register controls the horizontal total pixel count. Setting value + 1 is the total pixel count.
HDP (Horizontal Display Period)
Register
DisplayBaseAddress + 0x08
address
Bit number
15
Bit field name
Reserved
R/W
Initial value
This register controls the total horizontal display period in unit of pixel clocks. Setting value + 1 is
the pixel count for the display period.
HDB (Horizontal Display Boundary)
Register
DisplayBaseAddress + 0x0A
address
Bit number
15
Bit field name
Reserved
R/W
Initial value
This register controls the display period of the left part of the window in unit of pixel clocks. Setting
value + 1 is the pixel count for the display period of the left part of the window. When the window is
not divided into right and left before display, set the same value as HDP.
HSP (Horizontal Synchronize pulse Position)
Register
DisplayBaseAddress + 0x0C
address
Bit number
15
Bit field name
Reserved
R/W
Initial value
This register controls the pulse position of the horizontal synchronization signal in unit of pixel
clocks. When the clock count since the start of the display period reaches setting value + 1, the
horizontal synchronization signal is asserted.
HSW (Horizontal Synchronize pulse Width)
Register
DisplayBaseAddress + 0x0E
address
Bit number
7
Bit field name
R/W
Initial value
This register controls the pulse width of the horizontal synchronization signal in unit of pixel clocks.
Setting value + 1 is the pulse width clock count.
18-72
14
13
12
11
10
R0
0
14
13
12
11
10
R0
0
14
13
12
11
10
R0
0
14
13
12
11
10
R0
0
6
5
9
8
7
6
5
HTP
RW
X
9
8
7
6
5
HDP
RW
X
9
8
7
6
5
HDB
RW
X
9
8
7
6
5
HSP
RW
X
4
3
HSW
RW
X
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
2
1
0
0
0
0
0
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