Rotate Priority - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64

Rotate priority

When rotation priority is set in the DMACR/PR bits, the priority order is rotated.

After the bus is granted to the lowest numbered channel, the priority controller of DMAC switches

the channel during the transfer gap of the active channel.

In this way, if all the channels become active at the same time, the lowest numbered channel

(ch0) is selected by the priority controller to enable transfer operation.

In rotate priority mode, all channels are able to acquire the bus in turn. For example, the active

channel (ch0) temporarily loses the bus during the transfer gap. Access is then granted to the

second lowest numbered channel (ch1). When ch1 loses the bus access during the transfer gap,

it is granted to the third lowest numbered channel (ch2.)

Figure 15-10 shows the defined channel ordering in rotate priority mode.

HDMAC Internal

Defined channel

Figure 15-10 Defined channel ordering in rotate priority mode