Fujitsu MB86R02 Jade-D Hardware Manual page 828

MB86R02 'Jade-D' Hardware Manual V1.64
Bit field
No. Name
0 CPHA
SPI_SCK
(CPHA=0)
SPI_SCK
(CPHA=1)
SPI_DI Shift in
SPI_DI Shift out
SPI_SCK
(CPHA=0)
SPI_SCK
(CPHA=1)
SPI_DI Shift in
SPI_DI Shift out
Timing of I/O serial data (DI/DO) and serial clock (SCK) are specified.
Timing at CPHA = 0 or 1, and CPOL = 0 is shown in Figure 30-4
Timing at CPHA = 0 or 1, and CPOL = 1 is shown in Figure 30-5
Bit7 Bit6
Figure 30-4 Timing of serial data and serial clock (at CPOL = 0)
Bit7 Bit6
Figure 30-5 Timing of serial data and serial clock (at CPOL = 1)
Description
Bit5 Bit4 Bit3
Bit5 Bit4 Bit3
Bit2 Bit1 Bit0
Bit2 Bit1 Bit0
30-7