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MB86R02 'Jade-D' Hardware Manual V1.64
VSW (Vertical Synchronize pulse Width)
Register
DisplayBaseAddress + 0x0F
address
Bit number
7
Bit field name
Reserved
R/W
Initial value
This register controls the pulse width of vertical synchronization signal in unit of raster. Setting
value + 1 is the pulse width raster count.
VTR (Vertical Total Rasters)
Register
DisplayBaseAddress + 0x12
address
Bit number
15
Bit field name
Reserved
R/W
Initial value
This register controls the vertical total raster count. Setting value + 1 is the total raster count. For
the interlace display, Setting value + 1.5 is the total raster count for 1 field; 2 × setting value + 3 is
the total raster count for 1 frame (see Section 8.3.2).
VSP (Vertical Synchronize pulse Position)
Register
DisplayBaseAddress + 0x14
address
Bit number
15
Bit field name
Reserved
R/W
Initial value
This register controls the pulse position of vertical synchronization signal in unit of raster. The
vertical synchronization pulse is asserted starting at the setting value + 1st raster relative to the
display start raster
.
VDP (Vertical Display Period)
Register
DisplayBaseAddress + 0x16
address
Bit number
15
Bit field name
Reserved
R/W
Initial value
This register controls the vertical display period in unit of raster. Setting value + 1 is the count of
raster to be displayed.
6
5
R0
0
14
13
12
11
10
R0
0
14
13
12
11
10
R0
0
14
13
12
11
10
R0
0
4
3
VSW
RW
X
9
8
7
6
5
VTR
RW
X
9
8
7
6
5
VSP
RW
X
9
8
7
6
5
VDP
RW
X
2
1
0
4
3
2
1
4
3
2
1
4
3
2
1
18-73
0
0
0
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