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MB86R02 'Jade-D' Hardware Manual V1.64
34.4.2
DDR2SDRAM IF I/O (SSTL_18)
SSTL_18 DC characteristics (an excerpt from JESD8-15a).
Table 34-6 SSTL18 Input DC Logic Levels (Single Ended)
Symbol
VIH (DC)
DC input logic High
VIL (DC)
DC input logic Low
Table 34-7 SSTL18 Input AC Logic Levels (Single Ended)
Symbol
VIH (AC)
AC input logic High
VIL (AC)
AC input logic Low
Table 34-8 SSTL18 Input AC Test Conditions (Single Ended)
Symbol
VREF
Input reference voltage
Input single maximum peak to peak swing
VSWING (max.)
Input single minimum slew rate
SLEW
Table 34-9 SSTL18 Input DC Logic Levels (Differential Ended)
Symbol
VIN (DC)
DC input signal voltage
VID (DC)
DC differential input voltage
Table 34-10 SSTL18 Input AC Logic Levels (Differential Ended)
Symbol
VID (AC)
AC differential input voltage
VIX (AC)
AC differential cross point voltage
Table 34-11 SSTL18 Input AC Test Conditions (Differential Ended)
Symbol
Input timing measurement
Vr
reference level
Input signal peak to peak swing
VSWING
voltage
SLEW
Input signal slew rate
Table 34-12 SSTL18 Output DC Current Drive
Symbol
Output minimum source DC
IOH (DC)
current
IOL (DC)
Output minimum sink DC current
*1: VDDQ = 1.7V, VOUT = 1420mV
*2: VDDQ = 1.7V, VOUT = 280mV
*3: The value is different from JESD8-15a. (JESD8-15a: ±13.4mA)
34-10
Parameter
Parameter
Condition
Parameter
Parameter
0.5 VDDQ-175
Parameter
Parameter
Min.
Max.
VREF + 125
VDDQ + 300
-300
VREF - 125
Min.
Max.
VREF + 250
–
VREF - 250
Value
0.5 × VDDQ
1.0
1.0
Min.
Max.
-300
VDDQ + 300
250
VDDQ + 600
Min.
Max.
500
VDDQ + 600
0.5 × VDDQ + 175
Min.
Max.
VIX (cross point)
–
1.0
1.0
Min.
Max.
-11.4 (*3)
11.4 (*3)
Unit
mV
mV
Unit
mV
–
mV
Unit
V
V
V/ns
Unit
mV
mV
Unit
mV
mV
Unit
V
V
V/ns
–
Note
Unit
s
–
mA
(*1)
–
mA
(*2)
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