Toshiba GR-200 Series Instruction Manual page 79

From EF (EF2)
DEFCR
-CX
From VTF
≥1
VTF_DETECT
From PROT COMMON
CB_LOSS_PHASE
DEFCF
-CX
From PROT-COMMON
OCD-AT S
-CX
R ≥1
OCT-BT
S
-CX
R
≥1
OCT-CT S
-CX
R
≥1
1
800000EBBB EFF PHSEL-A
800000EBBC EFF PHSEL-B
800000EBBD EFF PHSEL-C
Permission signals received:
From Terminal 1
800000EBB5 INT.DEFCAR-R1-A =1
≥1
810000EBB6 INT.DEFCAR-R1-B
=1
≥1
820000EBB7 INT.DEFCAR-R1-C =1 ≥1
EZT.DISCAR-R1
=1
From Terminal 2
840000EBB8 INT.DEFCAR-R2-A
=1 ≥1
850000EBB9 INT.DEFCAR-R2-B
≥1
=1
860000EBBA INT.DEFCAR-R2-C
=1 ≥1
EZT.DISCAR-R2
=1
UOP
DEFCAR
POP
From CARRIER-COMMON
CH1-USE 1
CH2-USE
1
CAR_BLOCK
≥1
800000EBB0 DEFCAR_BLK
810000EBC1 DEFCAR_3PTP
800000EBC0 DEFCAR_ARCBLOCK
DEFCAR-OPT-A
DEFCAR-OPT-B
DEFCAR-OPT-C
DEFCAR-CS-A_POUP
DEFCAR-CS-B_POUP
DEFCAR-CS-C_POUP
ECHO logic
800000EBC2 DEFCAR_F.BLOCK
810000EBC3 DEFCAR_PERMIT
UOP
DEFCAR
POP
Figure 2.3-2 Sending circuit in POP and UOP
TDEFCB
t
&
0.00 to 0.30s
1
TDEFCF
t 0
&
&
t 0
&
&
&
t 0
&
≥1
0.00 to 0.30s
≥1
Week infeed
trip logic
≥1
(WIKT)
≥1
1
Current
1
Reversal
Logic
(CRL)
≥1
&
≥1
&
≥1
&
≥1
≥1
≥1
1
Figure 2.3-1 POP and UOP scheme logic
TSBCT-DEF
t 0
t 0
t 0
0.00 to 1.00s
≥1
≥1
≥1
≥1
- 60 -
0
≥1
TDEFC
8000001B6A
t 0
&
&
≥1
8100001B6B
t 0
&
&
≥1
8200001B6C
t 0
≥1
&
&
0.00 to 0.30s
≥1
≥1
DEFCAR_TPMD
3P
1P
≥1
DEFCAR-ARCBlk
Block
=1
=1
=1
=1
≥1
&
1
≥1
&
1
6F2T0200 (0.15)
To CRL
8400001B68
DEFCR-X
8300001B67
DEFCF-X
To carrier send circuit
DEFCAR-CS-A_POUP
DEFCAR-CS-B_POUP
DEFCAR-CS-C_POUP
8000001B74
&
DEFCAR-OPT-AR
8100001B75
&
DEFCAR-OPT-BR
8200001B76
& DEFCAR-OPT-CR
8300001B77
DEFCAR-OPT-S
8000001B20
≥1 DEFCAR-TRIP-A
8100001B21
≥1
DEFCAR-TRIP-B
8200001B22
DEFCAR-TRIP-C
≥1
&
DEFCAR-TPMD=1P
8100001B77
& DEFCAR-ARC-BLOCK
To TRC
DEFCAR_PERM1-A
DEFCAR_PERM1-B
DEFCAR_PERM1-C
DEFCAR_PERM2-A
DEFCAR_PERM2-B
DEFCAR_PERM2-C
To ECHO/EIKT
8000001B79
INT.DEFCAR-S-A
8100001B7A
INT.DEFCAR-S-B
8200001B7B
INT.DEFCAR-S-C
&
8F00001B7C
≥1
DEFCAR-S
&
GRE200 (1,2)