Mitsubishi Electric MELSEC Q Series Reference Manual page 75

(3) Differences from link refresh
Item
No. of steps
Processing speed
*1
(LD B0 )
Data reliability
*1 In the case of the Q02HCPU
*2 When the station-based block data assurance setting is enabled:
*3 When conditions for 32-bit data integrity assurance are satisfied:
Access method
Link refresh
1
High speed (0.034µs)
In units of stations or in units of 32
*2*3
bits
CHAPTER 4 FUNCTIONS
Direct access
2
Low speed (10 to 100µs)
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Page 76, Section 4.1.5
Page 76, Section 4.1.5
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