Register Descriptions; Read-Only Configuration Registers - Epson S1D13706 Technical Manual

Page 96
Register
+
REG[7Ch] PIP Window Display Start Address Register 0
+
REG[7Eh] PIP Window Display Start Address Register 2
+
REG[81h] PIP Window Line Address Offset Register 1
+
REG[85h] PIP Window X Start Position Register 1
+
REG[89h] PIP Window Y Start Position Register 1
+
REG[8Dh] PIP Window X End Position Register 1
+
REG[91h] PIP Window Y End Position Register 1
REG[A0h] Power Save Configuration Register
REG[A2h] Reserved
REG[A4h] Scratch Pad Register 0
REG[A8h] General Purpose IO Pins Configuration Register 0
REG[ACh] General Purpose IO Pins Status/Control Register 0 123
REG[B0h] PWM Clock / CV Pulse Control Register
REG[B2h] CV Pulse Burst Length Register

8.3 Register Descriptions

8.3.1 Read-Only Configuration Registers

Revision Code Register
REG[00h]
7 6
bits 7-2
bits 1-0
S1D13706
X31B-A-001-08
Table 8-1: S1D13706 Register Set
Picture-in-Picture Plus (PIP
Miscellaneous Registers
General Purpose IO Pins Registers
PWM Clock and CV Pulse Configuration Registers
Unless specified otherwise, all register bits are set to 0 during power-on.
Product Code Bits 5-0
5
Note
The S1D13706 returns a value of 28h.
Product Code
These are read-only bits that indicates the product code. The product code is 001010.
Revision Code
These are read-only bits that indicates the revision code. The revision code is 00.
Pg
+
) Registers
+
115 REG[7Dh] PIP Window Display Start Address Register 1
+
115 REG[80h] PIP Window Line Address Offset Register 0
+
115 REG[84h] PIP Window X Start Position Register 0
+
116 REG[88h] PIP Window Y Start Position Register 0
+
117 REG[8Ch] PIP Window X End Position Register 0
+
118 REG[90h] PIP Window Y End Position Register 0
119
120 REG[A1h] Reserved
121 REG[A3h] Reserved
121 REG[A5h] Scratch Pad Register 1
122 REG[A9h] General Purpose IO Pins Configuration Register 1
REG[ADh] General Purpose IO Pins Status/Control Register 1 125
126 REG[B1h] PWM Clock / CV Pulse Configuration Register
129 REG[B3h] PWMOUT Duty Cycle Register
4 3
Epson Research and Development
Vancouver Design Center
Register
Read Only
Revision Code Bits 1-0
2 1
Hardware Functional Specification
Issue Date: 01/11/13
Pg
115
115
116
117
118
119
120
121
121
122
128
129
0