Epson S1D13706 Technical Manual page 30

Embedded memory lcd controller
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Pin Name Type Pin #
BS#
I
8
RD/WR#
I
12
RD#
I
9
S1D13706
X31B-A-001-08
Table 4-3: Host Interface Pin Descriptions
IO
RESET#
Cell
Voltage
State
LIS
HIOVDD
1
LIS
HIOVDD
1
LIS
HIOVDD
1
This input pin has multiple functions.
• For Generic #1, this pin must be tied to HIO V
• For Generic #2, this pin must be tied to HIO V
• For SH-3/SH-4, this pin inputs the bus start signal (BS#).
• For MC68K #1, this pin inputs the address strobe (AS#).
• For MC68K #2, this pin inputs the address strobe (AS#).
• For REDCAP2, this pin must be tied to HIO V
• For DragonBall, this pin must be tied to HIO V
See Table 4-9: "Host Bus Interface Pin Mapping," on page 30 for
summary.
This input pin has multiple functions.
• For Generic #1, this pin inputs the read command for the
upper data byte (RD1#).
• For Generic #2, this pin must be tied to HIO V
• For SH-3/SH-4, this pin inputs the RD/WR# signal. The
S1D13706 needs this signal for early decode of the bus cycle.
• For MC68K #1, this pin inputs the R/W# signal.
• For MC68K #2, this pin inputs the R/W# signal.
• For REDCAP2, this pin inputs the R/W signal.
• For DragonBall, this pin must be tied to HIO V
See Table 4-9: "Host Bus Interface Pin Mapping," on page 30 for
summary.
This input pin has multiple functions.
• For Generic #1, this pin inputs the read command for the lower
data byte (RD0#).
• For Generic #2, this pin inputs the read command (RD#).
• For SH-3/SH-4, this pin inputs the read signal (RD#).
• For MC68K #1, this pin must be tied to HIO V
• For MC68K #2, this pin inputs the bus size bit 1 (SIZ1).
• For REDCAP2, this pin inputs the output enable (OE).
• For DragonBall, this pin inputs the output enable (OE).
See Table 4-9: "Host Bus Interface Pin Mapping," on page 30 for
summary.
Epson Research and Development
Vancouver Design Center
Description
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Hardware Functional Specification
Issue Date: 01/11/13

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