Lcd Pin Mapping For Y Connector (Lf26Sct) - Epson S1D13706 Technical Manual

Epson Research and Development
Vancouver Design Center

3.3 LCD Pin Mapping for Y Connector (LF26SCT)

Table 3-3: LCD Pin Mapping for Y Connector: Pins for Y - Driver (LF26SCT)
LCD Pin LCD Pin S1D13706
No. Name Pin Name
Y-1 DYIO1 No Connect Start pulse signal
Y-2 DYIO2 FPFRAME
Y-3 VDD
Y-4 V0Y
Y-5 NC No Connect No Connect
Y-6 V5Y
Y-7 VCCY
Y-8 FRY GPIO2
Y-9 YSCL GPIO1
Y-10 XINH GPIO0
Y-11 SHF
Y-12 GND VSS (GND)
Connecting to the Epson D-TFD Panels
Issue Date: 01/02/23
Description
Start pulse signal
- Power supply for liquid crystal drive
- Power supply for liquid crystal drive
Power supply for logic low and liquid crystal
-
drive
- Power supply for logic high
AC signal for output
Shift clock signal
Thinning control signal
- Shift direction selection for shift registers
Ground and power supply for liquid crystal
drive
Remarks
Forward scanning: Open
Reverse scanning: Active low pulse using
VCCY and V5Y for logic level.
Forward scanning: Active low pulse using
VCCY and V5Y for logic level.
Reverse scanning: Open
See Section 2.5, "Level Shift and Clamp
Circuit for Vertical Logic Control Signals"
on page 13.
See Section 2.4, "Swing Power Supply for
the Vertical Drive (V0Y) and Logic (VCCY
/ V5Y) Voltages" on page 12.
See Section 2.4, "Swing Power Supply for
the Vertical Drive (V0Y) and Logic (VCCY
/ V5Y) Voltages" on page 12.
See Section 2.4, "Swing Power Supply for
the Vertical Drive (V0Y) and Logic (VCCY
/ V5Y) Voltages" on page 12.
See Section 2.4, "Swing Power Supply for
the Vertical Drive (V0Y) and Logic (VCCY
/ V5Y) Voltages" on page 12.
See Section 2.5, "Level Shift and Clamp
Circuit for Vertical Logic Control Signals"
on page 13.
See Section 2.5, "Level Shift and Clamp
Circuit for Vertical Logic Control Signals"
on page 13.
See Section 2.5, "Level Shift and Clamp
Circuit for Vertical Logic Control Signals"
on page 13.
Forward scanning: V5Y
Reverse scanning: VCCY
Connect to V5Y.
Page 17
S1D13706
X31B-G-012-03