Table 4-10: Lcd Interface Pin Mapping - Epson S1D13706 Technical Manual

Epson Research and Development
Vancouver Design Center
4.7 LCD Interface Pin Mapping
Monochrome Passive
Panel
Pin Name
Single
4-bit 8-bit
FPFRAME
FPLINE
FPSHIFT
DRDY MOD
FPDAT0 driven 0 D0
FPDAT1 driven 0 D1
FPDAT2 driven 0 D2
FPDAT3 driven 0 D3
FPDAT4 D0 D4
FPDAT5 D1 D5
FPDAT6 D2 D6
FPDAT7 D3 D7
FPDAT8 driven 0 driven 0
FPDAT9 driven 0 driven 0
FPDAT10 driven 0 driven 0
FPDAT11 driven 0 driven 0
FPDAT12 driven 0 driven 0
FPDAT13 driven 0 driven 0
FPDAT14 driven 0 driven 0
FPDAT15 driven 0 driven 0
FPDAT16 driven 0 driven 0
FPDAT17 driven 0 driven 0
GPIO0 GPIO0 GPIO0
GPIO1 GPIO1 GPIO1
GPIO2 GPIO2 GPIO2
GPIO3 GPIO3 GPIO3
GPIO4 GPIO4 GPIO4
GPIO5 GPIO5 GPIO5
GPIO6 GPIO6 GPIO6
GPO
CVOUT
PWMOUT
Note
Hardware Functional Specification
Issue Date: 01/11/13

Table 4-10: LCD Interface Pin Mapping

Color Passive Panel
Single
Format 1
4-bit
8-bit
FPFRAME
FPSHIFT
FPSHIFT2
2
driven 0 D0 (B5)
2
driven 0 D1 (R5)
2
driven 0 D2 (G4)
2
driven 0 D3 (B3)
2 2
D0 (R2) D4 (R3)
2 2
D1 (B1) D5 (G2)
2 2
D2 (G1) D6 (B1)
2 2
D3 (R1) D7 (R1)
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
driven 0 driven 0
GPIO0 GPIO0
GPIO1 GPIO1
GPIO2 GPIO2
GPIO3 GPIO3
GPIO4 GPIO4
GPIO5 GPIO5
GPIO6 GPIO6
GPO (General Purpose Output)
1
GPIO pins must be configured as outputs (CNF3 = 0 at RESET#) when the HR-TFT or
D-TFD interface is selected.
2
These pin mappings use signal names commonly used for each panel type, however
signal names may differ between panel manufacturers. The values shown in brackets
represent the color components as mapped to the corresponding FPDATxx signals at
the first valid edge of FPSHIFT. For further FPDATxx to LCD interface mapping, see
Section 6.4, "Display Interface" on page 56.
3
When the HR-TFT interface is selected (REG[10h] bits 1-0 = 10), this GPO can be
used to control the HR-TFT MOD signal. Note this is not the same signal as the
S1D13706 DRDY(MOD) signal used for passive panels.
Format 2
16-Bit
8-bit 9-bit
FPLINE
MOD
2 2
D0 (G3) D0 (R6) R2
2 2
D1 (R3) D1 (G5) R1
2 2
D2 (B2) D2 (B4) R0
2 2
D3 (G2) D3 (R4) G2
2 2
D4 (R2) D8 (B5) G1
2 2
D5 (B1) D9 (R5) G0
2 2
D6 (G1) D10 (G4) B2
2 2
D7 (R1) D11 (B3) B1
2
driven 0 D4 (G3) B0
2
driven 0 D5 (B2) driven 0
2
driven 0 D6 (R2) driven 0
2
driven 0 D7 (G1) driven 0
2
driven 0 D12 (R3) driven 0
2
driven 0 D13 (G2) driven 0
2
driven 0 D14 (B1) driven 0
2
driven 0 D15 (R1) driven 0
driven 0 driven 0 driven 0
driven 0 driven 0 driven 0
GPIO0 GPIO0 GPIO0
GPIO1 GPIO1 GPIO1
GPIO2 GPIO2 GPIO2
GPIO3 GPIO3 GPIO3
GPIO4 GPIO4 GPIO4
GPIO5 GPIO5 GPIO5
GPIO6 GPIO6 GPIO6
CVOUT
PWMOUT
Color TFT Panel
Sharp HR-
Others
1
TFT
12-bit 18-bit 18-bit
SPS
LP
DCLK
DRDY no connect
R3 R5 R5
R2 R4 R4
R1 R3 R3
G3 G5 G5
G2 G4 G4
G1 G3 G3
B3 B5 B5
B2 B4 B4
B1 B3 B3
R0 R2 R2
driven 0 R1 R1
driven 0 R0 R0
G0 G2 G2
driven 0 G1 G1
driven 0 G0 G0
B0 B2 B2
driven 0 B1 B1
driven 0 B0 B0
GPIO0 GPIO0 PS
GPIO1 GPIO1 CLS
GPIO2 GPIO2 REV
GPIO3 GPIO3 SPL
GPIO4
GPIO4 GPIO4
(output only)
GPIO5
GPIO5 GPIO5
(output only)
GPIO6
GPIO6 GPIO6
(output only)
3
MOD
X31B-A-001-08
Page 31
Epson
1
D-TFD
18-bit
DY
LP
XSCL
GCP
R5
R4
R3
G5
G4
G3
B5
B4
B3
R2
R1
R0
G2
G1
G0
B2
B1
B0
XINH
YSCL
FR
FRS
RES
DD_P1
YSCLD
GPO
S1D13706