Display Modes; Display Features - Epson S1D13706 Technical Manual

Embedded memory lcd controller

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Epson Research and Development

Vancouver Design Center

2.4 Display Modes

2.6 Clock Source

2.7 Miscellaneous

Hardware Functional Specification

Issue Date: 01/11/13

• 1/2/4/8/16 bit-per-pixel (bpp) color depths.

• Up to 64 gray shades using Frame Rate Modulation (FRM) and dithering on mono-

chrome passive LCD panels.

• Up to 64K colors on passive STN panels.

• Up to 64K colors on active matrix LCD panels.

• Example resolutions:

320x240 at a color depth of 8 bpp

160x160 at a color depth of 16 bpp

160x240 at a color depth of 16 bpp

• SwivelView™: 90°, 180°, 270° counter-clockwise hardware rotation of display image.

• "Picture-in-Picture Plus": displays a variable size window overlaid over background

• Double Buffering/Multi-pages: provides smooth animation and instantaneous screen

• Two clock inputs: CLKI and CLKI2. It is possible to use one clock input only.

• Bus clock is derived from CLKI and can be internally divided by 2, 3, or 4.

• Memory clock is derived from bus clock. It can be internally divided by 2, 3, or 4.

• Pixel clock can be derived from CLKI, CLKI2, bus clock, or memory clock. It can be

internally divided by 2, 3, 4, or 8.

• Hardware/Software Video Invert.

• Software Power Save mode.

• General Purpose Input/Output pins are available.

• 100-pin TQFP15 package.

• 104-pin CFLGA package.

• Die form available.

X31B-A-001-08

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