Table 4-4: Lcd Interface Pin Descriptions - Epson S1D13706 Technical Manual

Page 26
4.4.2 LCD Interface
Pin Name Type Pin #
74-64,
FPDAT[17:0] O
61-55
FPFRAME O 52
FPLINE O 53
FPSHIFT O 54
DRDY O 48
GPIO0 IO 45
GPIO1 IO 44
S1D13706
X31B-A-001-08

Table 4-4: LCD Interface Pin Descriptions

IO RESET#
Cell
Voltage State
LB3P NIOVDD 0
LB3P NIOVDD 0
LB3P NIOVDD 0
LB3P NIOVDD 0
LO3 NIOVDD 0
LB3M NIOVDD 0
LB3M NIOVDD 0
Panel Data bits 17-0.
This output pin has multiple functions.
• Frame Pulse
• SPS for Sharp HR-TFT
• DY for Epson D-TFD
See Table 4-10: "LCD Interface Pin Mapping," on page 31 for
summary.
This output pin has multiple functions.
• Line Pulse
• LP for Sharp HR-TFT
• LP for Epson D-TFD
See Table 4-10: "LCD Interface Pin Mapping," on page 31 for
summary.
This output pin has multiple functions.
• Shift Clock
• CLK for Sharp HR-TFT
• XSCL for Epson D-TFD
See Table 4-10: "LCD Interface Pin Mapping," on page 31 for
summary.
This output pin has multiple functions.
• Display enable (DRDY) for TFT panels
• 2nd shift clock (FPSHIFT2) for passive LCD with Format 1
interface
• GCP for Epson D-TFD
• LCD backplane bias signal (MOD) for all other LCD panels
See Table 4-10: "LCD Interface Pin Mapping," on page 31 for
summary.
This pin has multiple functions.
• PS for Sharp HR-TFT
• XINH for Epson D-TFD
• General purpose IO pin 0 (GPIO0)
• Hardware Video Invert
See Table 4-10: "LCD Interface Pin Mapping," on page 31 for
summary.
This pin has multiple functions.
• CLS for Sharp HR-TFT
• YSCL for Epson D-TFD
• General purpose IO pin 1 (GPIO1)
See Table 4-10: "LCD Interface Pin Mapping," on page 31 for
summary.
Epson Research and Development
Vancouver Design Center
Description
Hardware Functional Specification
Issue Date: 01/11/13