S1D13706 Host Bus Interface; Host Bus Interface Pin Mapping - Epson S1D13706 Technical Manual

Embedded memory lcd controller

Hide thumbs Also See for S1D13706:

Table of Contents

Epson Research and Development

Vancouver Design Center

3 S1D13706 Host Bus Interface

Interfacing to the Motorola MPC821 Microprocessor

Issue Date: 01/02/23

The S1D13706 directly supports multiple processors. The S1D13706 implements a 16-bit

Generic #1 Host Bus Interface which is most suitable for direct connection to the Motorola

MPC821 microprocessor. Generic #1 supports a Chip Select and an individual Read

Enable/Write Enable for each byte.

The Generic #1 Host Bus Interface is selected by the S1D13706 on the rising edge of

RESET#. After RESET# is released, the bus interface signals assume their selected config-

uration. For details on the S1D13706 configuration, see Section 4.3, "S1D13706 Hardware

Configuration" on page 18.

The following table shows the functions of each Host Bus Interface signal.

Table 3-1: Host Bus Interface Pin Mapping

The Motorola MPC821 chip select module only handles 16-bit read cycles. As the

S1D13706 uses the chip select module to generate CS#, only 16-bit read cycles are pos-

sible and both the high and low byte enables can be driven by the MPC821 signal OE.

Motorola MPC821

Connect to HIO V

OE (see note)

System RESET

X31B-G-009-02

Table of Contents