Epson Research and Development
Vancouver Design Center
6.1.2 Internal Clocks
Symbol
f
Bus Clock frequency
BCLK
f
Memory Clock frequency
MCLK
f
Pixel Clock frequency
PCLK
f
PWM Clock frequency
PWMCLK
Note
Hardware Functional Specification
Issue Date: 01/11/13
Table 6-4: Internal Clock Requirements
Parameter
For further information on internal clocks, refer to Section 7, "Clocks" on page 90.
2.0V
3.3V
Min
Max
Min
20
20
20
20
Page 35
Units
Max
66
MHz
50
MHz
50
MHz
66
MHz
S1D13706
X31B-A-001-08