Big-Endian Bus Interface 14.1 Byte Swapping Bus Data - Epson S1D13706 Technical Manual

Embedded memory lcd controller
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14 Big-Endian Bus Interface
14.1 Byte Swapping Bus Data
S1D13706
X31B-A-001-08
The display buffer and register architecture of the S1D13706 is inherently little-endian. If
a host bus interface is configured as big-endian (CNF4 = 1 at reset), bus accesses are
automatically handled by byte swapping all read/write data to/from the internal display
buffer and registers.
Bus data byte swapping translates all byte accesses correctly to the S1D13706 register and
display buffer locations. To maintain the correct translation for 16-bit word access, even
address bytes must be mapped to the MSB of the 16-bit word, and odd address bytes to the
LSB of the 16-bit word. For example:
Byte write 11h to register address 1Eh
Byte write 22h to register address 1Fh
Word write 1122h to register address 1Eh->
Epson Research and Development
Vancouver Design Center
->
REG[1Eh] <= 11h
->
REG[1Fh] <= 22h
REG[1Eh] <= 11h
REG[1Fh] <= 22h
Hardware Functional Specification
Issue Date: 01/11/13

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