Epson S1D13706 Technical Manual page 147

Epson Research and Development
Vancouver Design Center
12.4 270° SwivelView™
physical memory
start address
A
SwivelView
C
image seen by programmer
= image in display buffer
Figure 12-3: Relationship Between The Screen Image and the Image Refreshed in 270° SwivelView.
Hardware Functional Specification
Issue Date: 01/11/13
Line Address Offset
The Main Window Line Address Offset registers (REG[78h], REG[79h]) is based on the
display width and programmed using the following formula.
Main Window Line Address Offset bits 9:0
= display width in pixels ÷ (32 ÷ bpp)
= 480 pixels ÷ 32 ÷ 8 bpp
= 120 (78h)
270° SwivelView™ requires the Memory Clock (MCLK) to be at least 1.25 times the
frequency of the Pixel Clock (PCLK), i.e. MCLK ≥ 1.25PCLK.
The following figure shows how the programmer sees a 320x480 portrait image and how
the image is being displayed. The application image is written to the S1D13706 in the
following sense: A–B–C–D. The display is refreshed by the S1D13706 in the following
sense: C-A-D-B.
B
window
display start address
(panel origin)
D
320
480
image refreshed by S1D13706
Page 141
S1D13706
X31B-A-001-08