Figure 3-1: Typical System Diagram (Generic #1 Bus); Figure 3-2: Typical System Diagram (Generic #2 Bus); Typical System Implementation Diagrams - Epson S1D13706 Technical Manual

Embedded memory lcd controller
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3 Typical System Implementation Diagrams

Generic #1
BUS
A[27:17]
CSn#
A[16:1]
D[15:0]
WE0#
WE1#
RD0#
RD1#
WAIT#
BUSCLK
RESET#
Generic #2
BUS
A[27:17]
CSn#
A[16:0]
D[15:0]
WE#
BHE#
RD#
WAIT#
BUSCLK
RESET#
S1D13706
X31B-A-001-08
HIOVDD
BS#
M/R#
Decoder
CS#
AB[16:1]
DB[15:0]
WE0#
WE1#
RD#
RD/WR#
WAIT#
CLKI
RESET#
AB0
VSS

Figure 3-1: Typical System Diagram (Generic #1 Bus)

VDD
BS#
RD/WR#
M/R#
Decoder
CS#
AB[16:0]
DB[15:0]
WE0#
WE1#
RD#
WAIT#
CLKI
RESET#

Figure 3-2: Typical System Diagram (Generic #2 Bus)

.
Oscillator
FPDAT[15:0]
S1D13706
.
Oscillator
S1D13706
Epson Research and Development
Vancouver Design Center
D[15:0]
FPFRAME
FPFRAME
FPLINE
FPLINE
FPSHIFT
FPSHIFT
DRDY
MOD
GPO
FPDAT[8:0]
D[8:0]
FPFRAME
FPFRAME
FPLINE
FPLINE
FPSHIFT
FPSHIFT
DRDY
DRDY
GPO
Hardware Functional Specification
Issue Date: 01/11/13
16-bit
Single
LCD
Display
9-bit
TFT
Display

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